1. In the sum of products function f (X,Y,Z) =Σ(2,3,4,5), the prime implicants are

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Answer. A

2. The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is

  1. 4
  2. 6
  3. 8
  4. 10

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Answer. b

3. Consider the given circuit

In this circuit, the race around

(A) does not occur
(B) occur when CLK = 0
(C) occur when CLK =1 and  A = B = 1
(D) occur when CLK=1 and  A = B = 0

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Answer. A

4. The state transition diagram for the logic circuit shown is

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Answer. D

5. The output Y of the logic circuit given below is

  1. 1
  2. 0
  3. X

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Answer. a

6. A two bit counter circuit is shown below

If the state QA QB of the counter at the clock time tn is ‘10’ then the state QA QB of the counter at tn + 3 (after three clock cycles) will be

  1. 00
  2. 01
  3. 10
  4. 11

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Answer. c

7. The increasing order of speed of data access for the following device is

(I) Cache Memory
(II) CD-ROM
(III) Dynamic RAM
(IV) Processor Registers
(V) Magnetic Tape

  1. (V), (II), (III), (IV), (I)
  2. (V), (II), (III), (I), (IV)
  3. (II), (I), (III), (IV), (V)
  4. (V), (II), (I), (III), (IV)

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Anwser. b

8. The complete set of only those Logic Gates designated as Universal Gates is

  1. NOT, OR and AND Gates
  2. XNOR, NOR and NAND Gates
  3. NOR and NAND Gates
  4. XOR, NOR and NAND Gates

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Anwser. c

9. A,B,C, and D are input, and Y is the output bit in the XOR gate circuit of the figure below. Which of the following statements about the sum S of A,B,C,D, and Y is correct?

  1. S is always with zero or odd
  2. S is always either zero or even
  3. S = 1 only if the sum of A,B,C, and D is even
  4. S = 1 only if the sum of A,B,C, and D is odd

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Answer. d

10. A 4 x 1 MUX is used to implement a 3-input Boolean function as shown in figure. The Boolean function F(A,B,C) implemented is

  1. F(A,B,C) = Σ (1,2,4,6)
  2. F(A,B,C) = Σ (1,2,6)
  3. F(A,B,C) = Σ (2,4,5,6)
  4. F(A,B,C) = Σ (1,5,6)

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Answer. a

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