An interrupt is a signal that alerts the processor to an urgent condition, either originating from hardware or triggered by software, necessitating immediate attention. This mechanism allows the processor to temporarily halt its current operations and address the event requiring attention. In this article, we will focus on software interrupts.
The 8085 microprocessor has eight software interrupts, ranging from RST 0 to RST 7. These interrupts allow the microprocessor to shift control from the main program to a subroutine. Upon completion of the subroutine, control is transferred back to the main program, resuming execution from the point where it was interrupted.
The vector addresses of these software interrupts are listed below:
| Instruction | Opcode | Vector Address |
| RST 0 | C7 H | 0000 H |
| RST 1 | CF H | 0008 H |
| RST 2 | D7 H | 0010 H |
| RST 3 | DF H | 0018 H |
| RST 4 | E7 H | 0020 H |
| RST 5 | EF H | 0028 H |
| RST 6 | F7 H | 0030 H |
| RST 7 | FF H | 0038 H |
To determine the opcode for any RST instruction, you add 8 to the previous opcode. For example:
- Opcode of RST 1 = (Opcode of RST 0 + 8) = (C7 H + 8) = CF H
- Opcode of RST 2 = (Opcode of RST 1 + 8) = (CF H + 8) = D7 H
- Opcode of RST 3 = (Opcode of RST 2 + 8) = (D7 H + 8) = DF H
Similarly, to find the vector address for any RST instruction, you multiply the RST number (n) by 8, convert the result to hexadecimal, and you get the vector address. For example:
- RST 0: n = 0, n x 8 = 0, so vector address = 0000 H
- RST 1: n = 1, n x 8 = 8, so vector address = 0008 H
- RST 2: n = 2, n x 8 = 16, so vector address = 0010 H
How Software Interrupts Work?
Software interrupt instructions are placed at the required points in the main program. When the processor encounters a software interrupt instruction, it first saves the current value of the Program Counter (PC) onto the stack. It then updates the PC with the address of the Interrupt Service Routine (ISR) specified by the interrupt vector. The processor proceeds to execute the ISR at this new address. Once the ISR completes its task, it uses a return instruction (RET) to restore the PC value from the stack, allowing the processor to resume execution of the main program where it was interrupted. Upon executing RET, the processor retrieves the saved PC value from the stack, allowing it to return to the main program after servicing the interrupt. The process of executing the ISR is called “servicing the interrupt.”
To store a software interrupt, the corresponding opcode must be stored. For example, to store RST 4, you would store E7 H. All RST instructions are 1-byte long and are similar to the CALL instruction, as both push the next line’s address onto the stack before transferring control to the ISR.
Key Points:
- All 8085 software interrupts are vectored interrupts, meaning they have fixed vector addresses.
- Software interrupts cannot be masked or disabled.
