8085 Microprocessor MCQ

121. To address the full memory space of an Intel 8085 microprocessor four RAMS of different sizes are available:

1. 8K x 8
2. 16K x 4
3. 32K x 4
4. 32K x 16

What minimal combination of chip(s) will serve the purpose?

1. 1, 2, 3 and 4
2. 2
3. 3
4. 4

122. An example of 8085 instruction that uses direct addressing is

1. RLC
2. STA
3. RRC
4. CMA

123. A 16 bit memory address register can address memory locations of

1. 16 k
2. 32 k
3. 64 k
4. 128 k

124. What are the number of memories required of size 16 x 4 to design a memory of size 64 x 8?

1. 2
2. 4
3. 6
4. 8

125. Which stack is used in 8085 microprocessors?

1. FIFO
2. FILO
3. LIFO
4. LILO

126. Memory chips of four different sizes as below are available:

1. 32 K x 4
2. 32 K x 16
3. 8 K x 8
4. 16 K x 4

All the memory chips as mentioned in the above list are Read/Write memory. What minimal combination of chips or chip alone can map full address space of 8085 microprocessor?

1. 1 and 2
2. 1 only
3. 2 only
4. 4 only

127. A memory system of 64 Kbytes needs to be designed with RAM chips of 1 Kbyte each, and a decoder tree constructed with 2 : 4 decoder chips with “Enable” input. What is the total number of decoder chips?

1. 21
2. 64
3. 32
4. 25

128. Which one of the following statements is correct?

1. ROM is 3 Read/Write Memory
2. PC points to the last instruction that was executed
3. Stack works on the principle of LIFO
4. All instructions affect the flags

129. How many and which types of machine cycles are needed to execute PUSH PSW by an Intel 8085 A microprocessor?

1. 2; Fetch and Memory write
2. 3; Fetch and 2 Memory write
3. 3; Fetch and 2 Memory read
4. 3; Fetch, Memory read and Memory write

130. Memory-mapped I/O-scheme for the allocation of address to memories and I/O devices, is used
for

1. small systems
2. large systems
3. both large and small systems
4. very large systems