1. CMP R
R ⇒ A, B, C, D, E, H, L, and M
Instruction word size ⇒ 1 Byte
Operation ⇒ When this instruction will execute the content of Register R will compare with the content of accumulator (A) and the status of flag affect accordingly to the result.
Note: It is nothing but SUB R instruction and status of the flag will affect according to the result of SUB R but the content of accumulator A and register R will not change. It means that the result of SUB R is discarded.
| Condition | Carry flag | Zero flag |
| [A] > [R] | 0 | 0 |
| [A] < [R] | 1 | 0 |
| [A] = [R] | 0 | 1 |
Rest of the flags change according to the result of SUB R.
Addressing Mode ⇒
If R ≠ M ⇒ Register Addressing Mode
If R = M ⇒ Indirect Addressing Mode
2. CPI 8 bit data
Instruction word size ⇒ 2 Byte
Operation ⇒ When this instruction will execute the 8-bit data will compare with the content of accumulator (A) and the status of flag affect accordingly to the result. The status of the flags will affect but the content of accumulator A will not change.
Note: It is nothing but SUI R instruction and status of the flag will affect according to the result of SUI R but the content of accumulator A and register R will not change. It means that result of SUI R is discarded.
| Condition | Carry flag | Zero flag |
| [A] > 8 bit data | 0 | 0 |
| [A] < 8 bit data | 1 | 0 |
| [A] = 8 bit data | 0 | 1 |
Rest of the flags change according to the result of SUI R.
Addressing Mode ⇒ Immediate Addressing Mode
Note: CMP and CPI instructions will affect all flags.
