1. ADD R
R ⇒ A, B, C, D, E, H, L, and M
Instruction word size ⇒ 1 Byte
Operation ⇒ When this instruction will execute the content of Register R will get added to the accumulator (A) and the final result will store in the accumulator [A].
[A] ← [A] + [R]
Addressing Mode ⇒
If R ≠ M ⇒ Register Addressing Mode
If R = M ⇒ Indirect Addressing Mode
For example:
[A] = 29 H [B] = 56 HADD B
[A] = 0 0 1 0 1 0 0 1 [B] = 0 1 0 1 0 1 1 0+
——————————–
0 1 1 1 1 1 1 1 = 7F H
[B] = 56 H [A] = 7F H2. ADI 8-bit data
Instruction word size ⇒ 2 Byte
Operation ⇒ When this instruction will execute the 8-bit data will get added to the accumulator (A) and the final result will store in the accumulator [A].
[A] ← [A] + 8-bit data
Addressing Mode ⇒ Immediate Addressing Mode
For example:
[A] = 10 HADD 12 H
[A] = 0 0 0 1 0 0 0 0= 0 0 0 1 0 0 1 0
+
——————————–
0 0 1 0 0 0 1 0 = 22 H
[A] = 22 H3. SUB R
R ⇒ A, B, C, D, E, H, L, and M
Instruction word size ⇒ 1 Byte
Operation ⇒ When this instruction will execute the content of Register R will get subtracted from the content of accumulator (A) and the final result will store in the accumulator [A].
[A] ← [A] − [R]
Addressing Mode ⇒
If R ≠ M ⇒ Register Addressing Mode
If R = M ⇒ Indirect Addressing Mode
For example:
[A] = 29 H [B] = 11 HSUB B
[A] = 0 0 1 0 1 0 0 1 [B] = 0 0 0 1 0 0 0 1−
——————————–
0 0 0 0 1 0 0 0 = 08 H
[B] = 11 H [A] = 08 H4. SUI 8-bit data
Instruction word size ⇒ 2 Byte
Operation ⇒ When this instruction will execute the 8-bit data will get subtracted from the accumulator (A) and the final result will store in the accumulator [A].
[A] ← [A] − 8-bit data
Addressing Mode ⇒ Immediate Addressing Mode
5. INR R
R ⇒ A, B, C, D, E, H, L, and M
Instruction word size ⇒ 1 Byte
Operation ⇒ When this instruction will execute the content of Register R will increased by 1 and the final result will store in the Register R.
[R] ← [R] + 1LSB
Addressing Mode ⇒
If R ≠ M ⇒ Register Addressing Mode
If R = M ⇒ Indirect Addressing Mode
For example:
[B] = 29 HINR B
[B] = 0 0 1 0 1 0 0 1+ 1
——————————–
0 0 1 0 1 0 1 0 = 2A H
[B] = 2A H6. DCR R
R ⇒ A, B, C, D, E, H, L, and M
Instruction word size ⇒ 1 Byte
Operation ⇒ When this instruction will execute the content of Register R will decrease by 1 and the final result will store in the Register R.
[R] ← [R] − 1LSB
Addressing Mode ⇒
If R ≠ M ⇒ Register Addressing Mode
If R = M ⇒ Indirect Addressing Mode
Note:
1. ADD, ADI, SUB, SUI instructions will affect the status of all flags.
2. INR and DCR instructions will affect the only status of four flags i.e. (S, Z, AC, P)
3. INR and DCR instructions will not affect the status of carry flag.
